Implementation and Packaging of Silicon Germanium Semiconductors for RF Applications (Digital Download)

Implementation and Packaging of Silicon Germanium Semiconductors for RF Applications is a publication of the U.S. Navy’s Electronics Manufacturing Productivity Facility (EMPF), managed by ACI Technologies, Inc., and provides insight for technical personnel in the electronics industry into packaging design and manufacturing cost reduction strategies for RF applications.

This publication will assist the reader in understanding the following: 

• Phased array antenna (PAA) architecture and cost drivers
• Material science leading to silicon germanium (SiGe) device selection
• Advanced surface mount technology (SMT) packaging alternatives
• Design for Manufacturing (DfM) considerations

1. Executive Summary
2. Phased Array Antenna Background
   1. Existing Phased Array Antenna Technology Overview
   2. Typical Architecture of a Phased Array Antenna
   3. Cost Drivers of Phased Array
   4. Semiconductor Devices in Existing Phased Array Antennas
   5. Frequency Requirements for Military Applications
3. Silicon Germanium Semiconductor Device Characteristics
   1. The Material Science of Silicon Germanium Semiconductors
   2. Evolution of Silicon Germanium Semiconductor Devices
   3. Semiconductor Material Considerations
   4. Silicon Germanium Foundry Selection
4. Design and Packaging Options
   1. Wire Bonding
   2. Flip Chip on Board (FCoB)
   3. Surface Mount Technology (SMT)
   4. Package on Package (PoP)
   5. Design and Packaging Summary
5. Design for Manufacturability (DFM) of Flip Chip on Board
   1. Stud Bumping Attachment for FCoB
   2. Underfill Process
   3. Finite Element Analysis d. Material Selection
   4. Reliability Analysis
   5. Benefits of Implementation
6. References